Name
Abstract | ||
|---|---|---|
Memristors offer advantages as a hardware solution for neuromorphic computing, and however, their nonlinear device property makes the weight update inaccurately and reduces the recognition accuracy of a neural network. In this paper, a piecewise linear (PL) method is proposed to mitigate the nonlinear effect of memristors by calculating the weight update parameters along a piecewise line, which reduces the errors in the weight update process. It mitigates the nonlinearity impact without reading the precise conductance of the memristor in each updating step, thereby avoiding complex peripheral circuits. The effectiveness of the proposed PL method with 2-segment, 3-segment, and 4-segment models in two split selection strategies is investigated, and the impact of various variations is considered. The results show that under different nonlinearities, the PL method can increase the recognition accuracy of the Modified National Institute of Standards and Technology (MNIST) handwriting digits to 87.87%–95.05% compared with 10.77%–73.18% of the cases without the PL method. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/JETCAS.2019.2910749 | IEEE Journal on Emerging and Selected Topics in Circuits and Systems |
Keywords | Field | DocType |
Memristors,Neuromorphics,Synapses,Hardware,Neural networks,Logic gates,Analytical models | Logic gate,Memristor,Nonlinear system,MNIST database,Computer science,Neuromorphic engineering,Electronic engineering,Artificial neural network,Piecewise linear function,Piecewise | Journal |
Volume | Issue | ISSN |
9 | 2 | 2156-3357 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jingyan Fu | 1 | 0 | 1.35 |
| Zhiheng Liao | 2 | 2 | 2.39 |
| Na Gong | 3 | 68 | 16.09 |
| Jinhui Wang | 4 | 87 | 20.44 |