A 65 nm CMOS Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion with 99.6% Current Efficiency at 10-mA Load. - Citegraph

Paper Info

Title
A 65 nm CMOS Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion with 99.6% Current Efficiency at 10-mA Load.

Year	DOI	Venue
2018	10.1007/978-3-030-23425-6_1	VLSI-SoC
Field	DocType	Citations
Inverter,Comparator,Computer science,Voltage reference,Voltage,CMOS,Verilog,Phase detector,Electrical engineering,Low-dropout regulator	Conference	0
PageRank	References	Authors
0.34	0	4

Authors (4 rows)

Cited by (0 rows)

References (0 rows)

Name	Order	Citations	PageRank
Naoki Ojima	1	1	1.37
Toru Nakura	2	92	31.27
Tetsuya Iizuka	3	92	33.22
kunihiro asada	4	273	78.26

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