Title
A 0.0071-mm 2 10.8ps pp -Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis
Abstract
This paper proposes an ultra-compact 4 to 10-Gb/s 5-tap current-mode transmitter to realize the sub 1-UI fractional de-emphasis (DE) using a hybrid delay line, which is alternatively controlled by the voltage bias and clock. It exhibits the scalability between the clocked 0.5-UI and 1-UI DEs and data rate. The sub-1-UI DE provides wide tunability of the data amplitude and delay to compensate different channel losses between the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1^{st}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2^{nd}$ </tex-math></inline-formula> Nyquist frequencies while effectively compensating the high-frequency portion of the pseudo-random binary sequence (PRBS) spectrum for data jitter improvement. Additional techniques are a two-step current-summing scheme, namely, two-step DE in the data path, and active inductors in both the data and clock paths to enhance the internal bandwidth without the need for passive inductors. In addition, we present an analytical model for predicting data-dependent jitter (DDJ) based on a generic system’s step response, derive the exact closed-form DDJ expression of DE, and verify its validity by mean of circuit simulation. Prototyped in 65-nm CMOS technology, it achieves a figure-of-merit of 4.6 mW/Gb/s and an output jitter of 10.8 ps <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><italic>pp</italic></sub> at 10 Gb/s under a PRBS <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2^{31}-1$ </tex-math></inline-formula> pattern. The data eyes measure 0.62-UI-horizontal and 19.5%-vertical openings after −20-dB channel loss. The die area is 0.0071 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .
Year
DOI
Venue
2019
10.1109/TCSI.2019.2919623
IEEE Transactions on Circuits and Systems I: Regular Papers
Keywords
DocType
Volume
Delays,Delay lines,Pulse width modulation,Frequency-domain analysis,Jitter,Transmitters,Clocks
Journal
66
Issue
ISSN
Citations 
10
1549-8328
1
PageRank 
References 
Authors
0.38
0
5
Name
Order
Citations
PageRank
Yong Chen1368.00
Peng Un Mak230165.06
Zunsong Yang341.44
Chirn Chye Boon413626.81
Rui Paulo da Silva Martins5642127.35