Name
Abstract | ||
|---|---|---|
Despite additional implementation complexity, adaptive routing shows its efficiency in sustaining network performance after bypassing a congested area of many-core based on-chip communication system. Performance is improved due to traversing packets through congestion-free links and switches either in minimal or non-minimal route. It helps in preventing the network from reaching an early saturation due to stalling of packets in the priority fixed shortest route. However, routing packets adaptively to an alternate route rather forwarding them to the priority fixed shortest route may lead to an unintended circumstance. It may lead to the delivery of packets to the sink node in an out-of-order sequence that is not accepted by a few message passing systems. Sorting such packets at the sink node at higher packet injection ratio becomes costlier due to large buffer requirement. Proposed method guarantees in-order delivery of packets under adaptive routing by reserving an alternate virtual path during virtual channel allocation process. Experiments on different synthetic and parallel traffic benchmarks with the proposed mechanism also ensure provably similar performances compared to the adaptive routing without considering ordering sequence.
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Year | DOI | Venue |
|---|---|---|
2019 | 10.1145/3356045.3360719 | Proceedings of the 12th International Workshop on Network on Chip Architectures |
Keywords | Field | DocType |
congestion aware NoC, network-on-chip, performance, virtual circuit switching | Computer science,Network packet,Computer network,Virtual circuit,Distributed computing | Conference |
ISBN | Citations | PageRank |
978-1-4503-6949-7 | 0 | 0.34 |
References | Authors | |
0 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tuhin Subhra Das | 1 | 5 | 2.87 |
| Prasun Ghosal | 2 | 51 | 22.38 |
| Navonil Chatterjee | 3 | 26 | 6.21 |