Name
Title | ||
|---|---|---|
Challenges and Solutions in Post-Silicon Validation of High-end Processors (Invited Tutorial) |
Abstract | ||
|---|---|---|
Due to the complexity of designs, post-silicon validation remains a major challenge with few systematic solutions. In this tutorial, we describe the main challenges in post-silicon validation of high-end processors and provide an overview of the state-of-the-art post silicon validation process used by IBM to verify its latest IBM POWER9 processor. We focus on numerous innovations that led to discovery of 30% more bugs in 20% less time over the previous generation. We demonstrate our methodology by describing several bugs from fail detection to root cause. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.23919/FMCAD.2019.8894258 | 2019 Formal Methods in Computer Aided Design (FMCAD) |
Keywords | Field | DocType |
high-end processors,post silicon validation process,IBM POWER9 processor | IBM,Software engineering,Post-silicon validation,Computer science,Real-time computing,Root cause | Conference |
ISSN | ISBN | Citations |
2641-8177 | 978-1-7281-4089-6 | 0 |
PageRank | References | Authors |
0.34 | 0 | 1 |