Name
Title | ||
|---|---|---|
A 10-mW 16-b 15-MS/s Two-Step SAR ADC With 95-dB DR Using Dual-Deadzone Ring Amplifier |
Abstract | ||
|---|---|---|
Low-noise ring amplifiers required for high-precision analog–digital converters (ADCs) greater than 16 b remain unexplored. This article demonstrates a two-step successive approximation (SAR) ADC achieving 91-dB signal-to-noise-and-distortion-ratio (SNDR) with 6-V differential input resulting in a low-frequency Schreier-figure-of-merit (
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) of 179.8 dB at 15 MS/s. The state-of-the-art performance is enabled by the ring-amplifier design that enables low noise during amplification and robust control of the transient dynamics. The ADC also features an on-chip residue amplifier (RA) settling characterization using the backend SAR ADC. The ADC is fabricated in a 180-nm CMOS process and occupies an active area of 1.82 mm
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>
. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/JSSC.2019.2943935 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Redundancy,Switches,Timing,Capacitors,Loading,Capacitance,Moon | Dead zone,Computer science,Electronic engineering,Successive approximation ADC,Amplifier | Journal |
Volume | Issue | ISSN |
54 | 12 | 0018-9200 |
Citations | PageRank | References |
2 | 0.37 | 0 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ahmed ElShater | 1 | 7 | 3.98 |
| Praveen Kumar Venkatachala | 2 | 3 | 4.79 |
| Calvin Yoji Lee | 3 | 3 | 1.75 |
| Muhlestein, J. | 4 | 12 | 4.25 |
| Spencer Leuenberger | 5 | 7 | 4.74 |
| Kazuki Sobue | 6 | 24 | 6.42 |
| Koichi Hamashita | 7 | 85 | 15.02 |
| Un-Ku Moon | 8 | 836 | 140.98 |