Name
Abstract | ||
|---|---|---|
Spin-transfer torque magnetic random access memory (STT-MRAM) is a promising nonvolatile memory technology for various applications from low power to high-density memory. However, STT-MRAM is prone to power analysis attacks due to its asymmetric resistive states and switching behavior. This noninvasive class of attacks is a serious threat to system security. To reduce the correlation between the data and the power consumption of the memory, a countermeasure based on a resilient cell design with a symmetrical structure is proposed in this article. The standard cell and the proposed cell have been attacked and their resiliencies are compared. When attacked with a correlation power analysis (CPA), the proposed bit cell attacked with the hamming weight (HW) model is 100 times more resilient compared to the standard STT-MRAM cell. The proposed bit cell attacked with the hamming distance (HD) or the STT power models is more than 500 times more resilient compared to the standard STT-MRAM cell. |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1109/TVLSI.2019.2940449 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Keywords | Field | DocType |
Computer architecture,Resistance,Magnetic tunneling,Switches,Microprocessors,Standards,Integrated circuit modeling | Power analysis,Computer science,Electronic engineering,Magnetoresistive random-access memory,Computer hardware,Bit cell | Journal |
Volume | Issue | ISSN |
28 | 1 | 1063-8210 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Samir Ben Dodo | 1 | 0 | 0.34 |
| Rajendra Bishnoi | 2 | 132 | 19.64 |
| Mehdi B. Tahoori | 3 | 1537 | 163.44 |