Paper Info
Title
ASP-SIFT: Using Analog Signal Processing Architecture to Accelerate Keypoint Detection of SIFT Algorithm
Abstract
The scale-invariant feature transform (SIFT) algorithm is still one of the most reliable image feature extraction methods. Despite its excellent robustness on various image transformations, SIFT’s intensive computational burden has been severely preventing it from being used in real-time and energy-efficient embedded machine vision systems. To reduce processing time and energy cost while executing SIFT, an analog signal processing architecture, analog signal processing (ASP)-SIFT, is proposed in this article. In ASP-SIFT, the Gaussian pyramid construction, difference-of-Gaussian (DoG) pyramid construction and keypoint locating, which are the primary steps of the keypoint detection part of the SIFT algorithm, are done directly with analog circuit networks. Thus, by completing keypoint detection in the analog domain, the total processing time is approximately equal to the settling time of the circuit network. Besides, by adopting a current-mode circuit network operating in the subthreshold region, the power dissipation would be very low. Simulation results show that the total processing speed for a typical video graphics array (VGA)-format ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$640\times480$ </tex-math></inline-formula> ) image is up to 2.3 kframes per second, which is at least <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3.26\times $ </tex-math></inline-formula> faster than the state-of-the-art digital hardware accelerators, while the system power is 94.5 mW and the energy consumption is only <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$40~\mu \text{J}$ </tex-math></inline-formula> per frame.
Year
DOI
Venue
2020
10.1109/TVLSI.2019.2936818
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Keywords
Field
DocType
Hardware,Signal processing algorithms,Dogs,Acceleration,Computer architecture,Feature extraction,Real-time systems
Computer vision,Scale-invariant feature transform,Settling time,Computer science,Feature extraction,Real-time computing,Robustness (computer science),Subthreshold conduction,Artificial intelligence,Pyramid,Video Graphics Array,Analog signal processing
Journal
Volume
Issue
ISSN
28
1
1063-8210
Citations 
PageRank 
References 
0
0.34
0
Authors
9
Name
Order
Citations
PageRank
Zichen Fan100.34
Zheyu Liu2106.55
Zheng Qu300.34
Fei Qiao49435.38
Wei Qi56018.07
Xin-Jun Liu63510.04
Yinan Sun7267.14
Shuzheng Xu8445.91
Huazhong Yang92239214.90