Paper Info
Title
A full functional Monolithic Active Pixel Sensor prototype for the CEPC vertex detector.
Abstract
The proposed Circular Electron-Positron Collider (CEPC) presents new challenges for pixel detectors in terms of cell size and functionality. A high data rate digital design and readout architecture of a Monolithic Active Pixel Sensor (MAPS) prototype for the CEPC vertex detector is presented. The MAPS prototype, together with the column drain based readout architecture, benefiting from the ALPIDE (ALice PIxel DEtector) and FE-I3 approaches, has been implemented to achieve high spatial resolution, fast readout, and low power consumption. The simulation results indicate the readout logic works properly with input data rates of 120MHz; while both analog front-end and in-pixel readout logic meet the 25ns bunch spacing constraint.
Year
DOI
Venue
2019
10.1109/ICECS46596.2019.8965105
ICECS
Field
DocType
Citations 
Computer science,CMOS sensor,Electronic engineering,Vertex detector,Pixel,Data rate,Detector,Image resolution,Collider,Power consumption
Conference
0
PageRank 
References 
Authors
0.34
0
17
Name
Order
Citations
PageRank
Tianya Wu100.34
Weiguo Lu200.34
Jianing Dong300.34
Long Li400.34
Wang Jia500.34
Ran Zheng600.34
Ping Yang700.34
Guangming Huang800.34
Sebastian Grinstein900.34
Raimon Casanova1000.34
Wei Wei1100.34
Xiaomin Wei1200.34
Ying Zhang1316325.25
Liang Zhang1400.34
Xiaoting Li1500.34
Zhijun Liang1600.34
Joao Guimaraes da Costa1700.34