Name
Title | ||
|---|---|---|
A 32-Gb/s 3.53-mW/Gb/s Adaptive Receiver AFE Employing a Hybrid CTLE, Edge-DFE and Merged Data-DFE/CDR in 65-nm CMOS |
Abstract | ||
|---|---|---|
A 32-Gb/s adaptive receiver analog front-end (AFE) with a hybrid continuous-time linear equalizer (CTLE), a half-rate distributed edge and data decision feedback equalizer (DFE) and a clock data recovery (CDR) is presented. The hybrid CTLE counters the low-frequency as well as the high-frequency loss of 21 dB at Nyquist. Further post-cursors can be solved by using a half- rate, distributed 3-tap edge-DFE and 2-tap data-DFE, which is partially embedded in the CDR. The distributed DFE scheme addresses the inter symbol interference (ISI) at the edge and reduces the data jitter while data-DFE guarantees the vertical opening of the data eye. Fabricated in 65-nm CMOS, occupying an active area of 0.3 mm
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>
, the proposed prototype demonstrates an improvement of 0.15 UI in the horizontal eye opening of the data output at a receiver AFE with the conventional 5-tap data-DFE at BER=10
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-12</sup>
, under a pseudorandom binary sequence (PRBS) of 2
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">31</sup>
-1. The competitive power efficiency of 3.53 mW/Gb/s is measured with a supply voltage of 1.2 V. |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/APCCAS47518.2019.8953146 | 2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) |
Keywords | Field | DocType |
CMOS,receiver,analog front-end (AFE),low frequency equalization (LFEQ),inductorless,continuous-time linear equalizer (CTLE),pseudorandom binary sequence (PRBS),channel loss,decision feedback equalization (DFE) | Electrical efficiency,Computer science,Voltage,Pseudorandom binary sequence,Electronic engineering,CMOS,Interference (wave propagation),Data recovery,Nyquist–Shannon sampling theorem,Jitter | Conference |
ISBN | Citations | PageRank |
978-1-7281-2941-9 | 1 | 0.36 |
References | Authors | |
8 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Arya Balachandran | 1 | 1 | 0.36 |
| Yong Chen | 2 | 11 | 5.01 |
| Chirn Chye Boon | 3 | 136 | 26.81 |