Title | ||
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Towards the Improvement of Training Efficiency and Image Recognition Accuracy for an FPGA Controlled Mini-Car by Offloading Neural Network Training |
Abstract | ||
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This paper describes the design of our field-programmable gate array (FPGA)-controlled Mini-Car and the development strategy for the FPT2019 FPGA Design Competition. We have improved our development strategy for the FPGA-controlled Mini-Car by extending our previous design for the HEART2019 FPGA Design Contest. In our new development plan, we employ multiple image sensors to capture both road conditions and traffic lights at the same time. To manage these diverse image information, we utilize multiple simple functioned neural networks for more accurate image recognition. Embedded FPGA platforms are not powerful enough for training these neural networks efficiently; therefore, we are also trying to develop a practical framework to offload the neural network training computation to high-performance servers. This framework will allow us to utilize the trained network information on our FPGA-controlled Mini-Car efficiently. |
Year | DOI | Venue |
---|---|---|
2019 | 10.1109/ICFPT47387.2019.00087 | 2019 International Conference on Field-Programmable Technology (ICFPT) |
Keywords | Field | DocType |
Autonomous driving car,Deep learning,Field programmable gate arrays,Image recognition,Object detection | Computer vision,Object detection,Image sensor,Development plan,Computer science,Server,Field-programmable gate array,Gate array,Artificial intelligence,Deep learning,Artificial neural network | Conference |
ISBN | Citations | PageRank |
978-1-7281-2944-0 | 0 | 0.34 |
References | Authors | |
0 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Musashi Aoto | 1 | 1 | 0.72 |
Moe Mitsugi | 2 | 0 | 0.34 |
Takumi Momose | 3 | 0 | 0.34 |
Yasutaka Wada | 4 | 72 | 11.19 |