Name
Title | ||
|---|---|---|
A 65nm Sub-Threshold Logic Standard Cell Library Using Quasi-Schmitt-Trigger Design Scheme and INWE-Aware Sizing |
Abstract | ||
|---|---|---|
In this study, the authors propose a sub-threshold standard cell library in which the quintessence is a quasi-Schmitt-trigger logic design scheme and the inverse narrow width effect aware sizing method. The techniques can improve the Ion-to-Ioff ratio of the logic cells effectively and provide a significant suppression in leakage current, enhancing the robustness of the circuits. Simulation result... |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1049/iet-cds.2019.0028 | IET Circuits, Devices & Systems |
Keywords | DocType | Volume |
leakage currents,logic circuits,logic design,logic gates,low-power electronics,threshold logic,trigger circuits | Journal | 14 |
Issue | ISSN | Citations |
3 | 1751-858X | 0 |
PageRank | References | Authors |
0.34 | 0 | 8 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Liang Wen | 1 | 0 | 0.34 |
| Nan Longmei | 2 | 0 | 0.34 |
| Jing Zhang | 3 | 0 | 0.34 |
| Chunning Meng | 4 | 0 | 0.34 |
| Yang Lu | 5 | 0 | 0.34 |
| Shiqian Qi | 6 | 0 | 0.34 |
| Jianping Lv | 7 | 0 | 0.34 |
| Yue-jun Zhang | 8 | 0 | 0.34 |