Name
Title | ||
|---|---|---|
Design of a real-time face detection architecture for heterogeneous systems-on-chips. |
Abstract | ||
|---|---|---|
Object detection represents one of the most important and challenging task in computer vision applications. Boosting-based approaches deal with computational intensive operations and they involve several sequential tasks that make very difficult developing hardware implementations with high parallelism level. This work presents a new hardware architecture able to perform object detection based on a cascade classifier in real-time and resource-constrained systems. As case study, the proposed architecture has been tailored to accomplish the face detection task and integrated within a complete heterogeneous embedded system based on a Xilinx Zynq-7000 FPGA-based System-on-Chip. Experimental results show that, thanks to the proposed parallel processing scheme and the runtime adaptable strategy to slide sub-windows across the input image, the novel design achieves a frame rate up to 125fps for the QVGA resolution, thus significantly outperforming previous works. Such a performance is obtained by using less than 10% of on-chip available logic resources with a power consumption of 377 mW at the 100 MHz clock frequency. |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1016/j.vlsi.2020.04.008 | Integration |
Keywords | DocType | Volume |
Integral images,Face detection,Image processing,FPGA | Journal | 74 |
ISSN | Citations | PageRank |
0167-9260 | 0 | 0.34 |
References | Authors | |
0 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Fanny Spagnolo | 1 | 8 | 4.00 |
| Stefania Perri | 2 | 264 | 33.11 |
| Pasquale Corsonello | 3 | 278 | 38.06 |