Abstract | ||
---|---|---|
Considering implementation in a low-end FPGA with more restrictions on on-chip memory resources and external memory bandwidth, existing methods are Limited by communication with external memory. The on-chip memory in a low-end FPGA is small, hence cannot store an entire feature map. It is imperative to rely on external memory for buffering. Although an on-chip memory in an FPGA is fast, implementing sparse CNN in low-end FPGAs is hindered by their limited memory size. To address the limitations of external memory bandwidth and its size, we employ a split-CNN [1] that splits an input image into small spatial patches and tests each patch using a CNN model as shown in Fig. 1. Since the feature-map to be processed at one time is reduced by the splitting, the amount of memory required for buffering is reduced. |
Year | DOI | Venue |
---|---|---|
2020 | 10.1109/FCCM48280.2020.00061 | 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) |
Keywords | DocType | ISSN |
low-end FPGA,on-chip memory resources,external memory bandwidth,sparse CNN,tiny on-chip memory realization,weight sparseness split-CNN,small spatial patches | Conference | 2576-2613 |
ISBN | Citations | PageRank |
978-1-7281-5804-4 | 0 | 0.34 |
References | Authors | |
0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Akira Jinguji | 1 | 5 | 4.18 |
Shimpei Sato | 2 | 43 | 13.03 |
Hiroki Nakahara | 3 | 155 | 37.34 |