Title
High-speed AWG exploiting parallel time interleaved DAC cores
Abstract
An arbitrary waveform generator architecture that exploits multiple DAC cores to increase the sample rate with respect to AWG architectures based on an individual DAC is proposed. The processing operations necessary to distribute the waveform samples between the DAC cores are illustrated. The preliminary results highlighting the performance expected from the proposed architecture are shown.
Year
DOI
Venue
2020
10.1109/I2MTC43012.2020.9129138
2020 IEEE International Instrumentation and Measurement Technology Conference (I2MTC)
Keywords
DocType
ISBN
AWG generator,digital to analog conversion,parallel operation,time-interleaving,randomization
Conference
978-1-7281-4460-3
Citations 
PageRank 
References 
0
0.34
0
Authors
4
Name
Order
Citations
PageRank
M. D’Arco100.34
Leopoldo Angrisani238957.11
P. Monsurrò300.34
A. Trifiletti443363.29