Name
Abstract | ||
|---|---|---|
This article presents a next-generation test data compression scheme. It builds on the isometric compression paradigm, but makes it more flexible and elevates encoding efficiency to values unachievable through state-of-the-art sequential compression schemes. Furthermore, its programmable selection of full-toggle scan chains ensures high test coverage and virtually eliminates compression aborts. The presented approach follows from a fundamental observation that among test cube care bits, only a very few have a status of necessary assignments (their locations cannot be changed), whereas the remaining ones have alternative sites. These test cubes are used to form circular test templates which synergistically control a decompressor and guide back ATPG to find assignments yielding highly compressible test patterns. A redesigned low-silicon-area decompressor is also capable of reducing switching rates in scan chains with a new test power control scheme. The experimental results obtained for large industrial designs and other benchmark circuits confirm the superiority of the proposed scheme over existing techniques and are reported herein. |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1109/TCAD.2019.2945760 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Keywords | DocType | Volume |
Registers,Encoding,Ring generators,Switches,Test data compression,System-on-chip,Circuit faults | Journal | 39 |
Issue | ISSN | Citations |
10 | 0278-0070 | 1 |
PageRank | References | Authors |
0.35 | 0 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yu Huang | 1 | 5 | 2.59 |
| Sylwester Milewski | 2 | 3 | 3.12 |
| Janusz Rajski | 3 | 2460 | 201.28 |
| Jerzy Tyszer | 4 | 838 | 74.98 |
| Chen Wang | 5 | 253 | 15.83 |