Abstract | ||
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We treat the problem of analog integrated circuit (IC) obfuscation toward intellectual property (IP) protection against reverse engineering. Obfuscation is achieved by camouflaging the effective geometry of layout components via the use of fake contacts, which originally were proposed for gate camouflaging in digital ICs. We present a library of obfuscated layout components, we give recommendation... |
Year | DOI | Venue |
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2021 | 10.1109/TCAD.2020.3011662 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Keywords | DocType | Volume |
Integrated circuits,Transistors,Reverse engineering,Layout,Logic gates,Security,Contacts | Journal | 40 |
Issue | ISSN | Citations |
5 | 0278-0070 | 1 |
PageRank | References | Authors |
0.36 | 0 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Julian Leonhard | 1 | 4 | 2.11 |
Alhassan Sayed | 2 | 6 | 1.82 |
Marie-Minerve Louerat | 3 | 23 | 6.46 |
H. Aboushady | 4 | 5 | 1.79 |
Haralampos-G. D. Stratigopoulos | 5 | 252 | 28.06 |