Name
Affiliation
Papers
HARALAMPOS-G. D. STRATIGOPOULOS
CNRS Grenoble INP UJF, TIMA Lab, 46 Av Felix Viallet, F-38031 Grenoble, France
49
Collaborators
Citations 
PageRank 
79
252
28.06
Referers 
Referees 
References 
410
692
409
Search Limit
100692
Title
Citations
PageRank
Year
Reliability Analysis of a Spiking Neural Network Hardware Accelerator00.342022
RF Transceiver Security Against Piracy Attacks00.342022
Digitally Assisted Mixed-Signal Circuit Security10.362022
SyncLock: RF Transceiver Security Using Synchronization Locking00.342022
BIST-Assisted Analog Fault Diagnosis00.342021
Analog and Mixed-Signal IC Security Via Sizing Camouflaging10.362021
Locking by Untuning: A Lock-Less Approach for Analog and Mixed-Signal IC Security00.342021
Neuron-PUF: Physical Unclonable Function Based on a Single Spiking Neuron10.352021
Breaking Analog Biasing Locking Techniques via Re-Synthesis20.382021
SymBIST: Symmetry-Based Analog and Mixed-Signal Built-In Self-Test for Functional Safety00.342021
Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism00.342020
Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP00.342020
Securing Programmable Analog ICs Against Piracy00.342020
MixLock: Securing Mixed-Signal Circuits via Logic Locking00.342019
IP Session on Machine Learning Applications in IC Test-Related Tasks00.342019
Adaptive Test With Test Escape Estimation for Mixed-Signal ICs.00.342018
Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations.00.342017
Recap of the European Test Symposium 2017 (ETS'17).00.342017
Built-in test of millimeter-Wave circuits based on non-intrusive sensors00.342016
A Fully-Digital BIST Wrapper Based on Ternary Test Stimuli for the Dynamic Test of a 40 nm CMOS 18-bit Stereo Audio ΣΔ ADC.00.342016
ETS 2016 foreword00.342016
Practical Simulation Flow for Evaluating Analog/Mixed-Signal Test Techniques.20.392016
One-Shot Non-Intrusive Calibration Against Process Variations for Analog/RF Circuits.50.462016
A 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs.30.512016
Guest Editors' Introduction: Top Papers from the 2015 International Test Conference.00.342016
Exploiting Pipeline ADC Properties for a Reduced-Code Linearity Test Technique60.502015
Test and Calibration of RF Circuits Using Built-in Non-intrusive Sensors00.342015
Parametric Built-In Test for 65nm RF LNA Using Non-Intrusive Variation-Aware Sensors10.362015
Evaluation of low-cost mixed-signal test techniques for circuits with long simulation times40.462015
Yield Forecasting in Fab-to-Fab Production Migration Based on Bayesian Model Fusion50.552015
High frequency jitter estimator for SoCs30.472015
Statistical Evaluation of Digital Techniques for $\sum\varDelta$ ADC BIST.00.342014
One-Shot Calibration of RF Circuits Based on Non-Intrusive Sensors100.742014
Fault modeling and diagnosis for nanometric analog circuits00.342013
Multivariate Statistical Techniques For Analog Parametric Test Metrics Estimation30.412013
Guest Editors' Introduction: Digitally Enhanced Wireless Transceivers.00.342012
Diagnosis of Local Spot Defects in Analog Circuits.230.962012
RF specification test compaction using learning machines70.642010
Density estimation for analog/RF test problem solving00.342010
Special session 12A: Panel adaptive analog test: Feasibility and opportunities ahead00.342010
Sensors for built-in alternate RF test221.222010
Analog Neural Network Design For Rf Built-In Self-Test80.592010
Enrichment of limited training sets in machine-learning-based analog/RF test120.702009
Evaluation of analog/RF test measurements at the design stage312.232009
Error Moderation in Low-Cost Machine-Learning-Based Analog/RF Testing513.272008
A general method to evaluate RF BIST techniques based on non-parametric density estimation80.892008
Non-RF to RF Test Correlation Using Learning Machines: A Case Study382.102007
Bridging the Accuracy of Functional and Machine-Learning-Based Mixed-Signal Testing40.692006
Generating decision regions in analog measurement spaces10.362005