Title
Time and Area Optimized Testing of Automotive ICs
Abstract
As cars become increasingly computerized and their safety functions evolve rapidly, the number of complex safety-critical components deployed in advanced driver assistance systems or autonomous vehicles is rising dramatically with high-end models containing hundreds of embedded microcontrollers. These integrated circuits must adhere to stringent requirements for high quality and long-term reliability driven by functional safety standards. This requires test solutions that address challenges posed by automotive systems. This article presents a scan-based test scheme optimizing test time and area overhead during manufacturing and in-system test of automotive electronics. The proposed scheme deploys observation test points that capture the faulty effects in every shift cycle into separate observation scan chains. To reduce area overhead, the scheme enables the sharing of flip-flops among control points. It is also shown how test points enhance test coverage (TC) in the presence of cascaded clock gaters. Finally, processing challenges when fault simulating every scan shift cycle to determine TC are addressed. Experimental results obtained for contemporary automotive designs and reported herein show significant improvements in test quality over traditional solutions.
Year
DOI
Venue
2021
10.1109/TVLSI.2020.3025138
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Keywords
DocType
Volume
Embedded test,functional safety,logic built-in self test (LBIST),scan-based testing,test application time,test points
Journal
29
Issue
ISSN
Citations 
1
1063-8210
0
PageRank 
References 
Authors
0.34
0
10
Name
Order
Citations
PageRank
Nilanjan Mukherjee180157.26
Daniel Tille2245.69
Mahendar Sapati300.34
Yingdi Liu482.51
Jeffrey Mayer500.68
Sylwester Milewski633.12
Elham Moghaddam7797.05
Janusz Rajski82460201.28
Jĕdrzej Solecki9284.07
Jerzy Tyszer1083874.98