Title
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15,000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency
Abstract
IoT node application requirements are torn between sporadic data-logging and energy-hungry data processing (e.g. image classification). This paper presents a versatile IoT node covering this gap in processing and energy by leveraging two on-chip sub-systems: a low power, clock-less, event-driven Always-Responsive (AR) part and an energy-efficient On-Demand (OD) part. The AR contains a 1.7MOPS event-driven, asynchronous Wake-up Controller (WuC) with 207ns wake-up time optimized for short sporadic computing. OD combines a deep-sleep RISC-V CPU and 1.3TOPS/W Machine Learning (ML) and crypto accelerators for more complex tasks. The node can perform up to 36GOPS while achieving 15,000× reduction from peak-to-idle power consumption. The interest of this versatile architecture is demonstrated with 105μW daily average power on an applicative classification scenario.
Year
DOI
Venue
2020
10.1109/VLSICircuits18222.2020.9163000
2020 IEEE Symposium on VLSI Circuits
Keywords
DocType
ISSN
applicative classification scenario,IoT node application requirements,sporadic data-logging,energy-hungry data processing,short sporadic computing,peak-to-idle power consumption,energy-efficient on-demand part,peak-to-idle power reduction,adaptive versatile IoT node,asynchronous wake-up controller,wake-up time,on-chip sub-systems,deep-sleep RISC-V CPU,machine learning,crypto accelerators,SamurAI,low power clock-less event-driven always-responsive part,time 207.0 ns,power 105.0 muW
Conference
2158-5601
ISBN
Citations 
PageRank 
978-1-7281-9943-6
1
0.37
References 
Authors
0
21