Title
Towards Purposeful Design Space Exploration Of Heterogeneous Cgras: Clock Frequency Estimation
Abstract
Coarse Grained Reconfigurable Arrays become increasingly popular. Besides research on scheduling algorithms and microarchitecture concepts, the use of heterogeneous structures can be a key approach to exploit their full potential. Unfortunately, a purposeful design space exploration of CGRAs is not trivial, since one needs to know the clock frequency of the resulting hardware implementation. This paper discusses challenges and a statistical approach to maximum clock frequency estimation of heterogeneous CGRAs with an irregular interconnect on FPGAs. The presented approach allows estimation with a maximum error of 8.8 - 17.4 % and a mean error of only 1.9 - 4.6 %.
Year
DOI
Venue
2020
10.1109/DAC18072.2020.9218649
PROCEEDINGS OF THE 2020 57TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC)
DocType
ISSN
Citations 
Conference
0738-100X
0
PageRank 
References 
Authors
0.34
0
3
Name
Order
Citations
PageRank
Dennis Leander Wolf100.34
Christoph Spang200.34
Christian Hochberger345799.51