Title
Achieving Analog Layout Integrity through Learning and Migration Invited Talk
Abstract
Analog IC designers and design houses have been accumulating their own design knowledge and constructing their own analog design repositories, including various design specifications, applications, and process technologies. As most of the analog layouts are handcrafted art works, different designers/companies may have different layout guidelines and preferences. When generating a new layout for certain analog design which already exists or is similar to any of those in the repositories, but with different circuit parameters or process technology files, applying layout migration is usually more preferable than starting from scratch. This paper introduces a holistic framework and new layout generation methodology to achieve analog layout integrity through learning and migration. The introduced methodology can effectively and efficiently preserve the preferences of placement and routing topologies from legacy layouts to new ones.
Year
Venue
Keywords
2020
2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD)
Analog layout,circuit structure analysis,building block,circuit classification,circuit identification,layout pattern,layout template,migration,analog placement,analog routing,machine learning
DocType
ISSN
Citations 
Conference
1933-7760
0
PageRank 
References 
Authors
0.34
9
7
Name
Order
Citations
PageRank
Mark Po-Hung Lin112.40
Hao-Yu Chi202.03
Abhishek Patyal301.69
Zheng-Yao Liu400.34
Jun-Jie Zhao500.34
Chien-Nan Jimmy Liu69727.07
Hung-Ming Chen749359.19