Title | ||
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A DLL-based Body Bias Generator for Minimum Energy Operation with Independent P-well and N-well Bias |
Abstract | ||
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This paper proposes an area- and energy-efficient DLL-based body bias generator (BBG) for minimum energy operation that controls p-well and n-well bias independently so that the BBG can minimize total energy consumption under a skewed process condition between nMOSFETs and pMOSFETs. The proposed BBG is composed of digital cells compatible with cell-based design, which results in low energy consumption and small area. A test circuit is implemented in a 65-nm FDSOI process. Measurement results using a 32-bit RISC processor implemented on the same chip show that the proposed BBG can reduce energy consumption close to a minimum where the amount of excess energy is 3%. In this condition, energy and area overheads of the BBG are 0.2% and 0.12%, respectively. |
Year | DOI | Venue |
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2020 | 10.1109/APCCAS50809.2020.9301711 | 2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) |
Keywords | DocType | ISBN |
total energy consumption,skewed process condition,BBG,cell-based design,low energy consumption,65-nm FDSOI process,energy consumption close,minimum energy operation,energy-efficient DLL-based body bias generator | Conference | 978-1-7281-9397-7 |
Citations | PageRank | References |
0 | 0.34 | 7 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
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Kentaro Nagai | 1 | 0 | 0.34 |
Jun Shiomi | 2 | 0 | 0.68 |
Hidetoshi Onodera | 3 | 455 | 105.29 |