Name
Title | ||
|---|---|---|
1st-Order to 2nd-Order Threshold Logic Gate Transformation with an Enhanced ILP-based Identification Method |
Abstract | ||
|---|---|---|
ABSTRACTThis paper introduces a method to enhance an integer linear programming (ILP)-based method for transforming a 1st-order threshold logic gate (1-TLG) to a 2nd-order TLG (2-TLG) with lower area cost. We observe that for a 2-TLG, most of the 2nd-order weights (2-weights) are zero. That is, in the ILP formulation, most of the variables for the 2-weights could be set to zero. Thus, we first propose three sufficient conditions for transforming a 1-TLG to a 2-TLG by extracting 2-weights. These extracted weights are seen to be more likely non-zero. Then, we simplify the ILP formulation by eliminating the non-extracted 2-weights to speed up the ILP solving. The experimental results show that, to transform a set of 1-TLGs to 2-TLGs, the enhanced method saves an average of 24% CPU time with only an average of 1.87% quality loss in terms of the area cost reduction rate. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1145/3394885.3431558 | Asia and South Pacific Design Automation Conference |
DocType | ISSN | Citations |
Conference | 2153-6961 | 0 |
PageRank | References | Authors |
0.34 | 0 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Li-Cheng Zheng | 1 | 0 | 1.35 |
| Hao-Ju Chang | 2 | 0 | 0.34 |
| Yung-Chih Chen | 3 | 413 | 39.89 |
| Jing-Yang Jou | 4 | 681 | 88.55 |