Name
Abstract | ||
|---|---|---|
LOOPLock is the state-of-the-art cyclic logic locking method in hardware security. LOOPLock is able to invalidate SAT Attack, Removal Attack, and CycSAT simultaneously by introducing two types of cycle pairs in a circuit. In this work, we analyze LOOPLock’s locking mechanism and propose an attacking approach based on locking structure analysis. Furthermore, to defend the new attack, we propose LOO... |
Year | DOI | Venue |
|---|---|---|
2022 | 10.1109/TCAD.2021.3053912 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Keywords | DocType | Volume |
Circuit faults,Merging,Security,Logic gates,Wires,Manufacturing,Hardware | Journal | 41 |
Issue | ISSN | Citations |
1 | 0278-0070 | 0 |
PageRank | References | Authors |
0.34 | 0 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xiang-Min Yang | 1 | 0 | 0.68 |
| Pei-Pei Chen | 2 | 0 | 0.34 |
| Hsiao-Yu Chiang | 3 | 0 | 0.68 |
| Chia-Chun Lin | 4 | 0 | 0.34 |
| Yung-Chih Chen | 5 | 413 | 39.89 |
| Chun-Yao Wang | 6 | 0 | 1.01 |