Name
Title | ||
|---|---|---|
Two hardware implementations for modular multiplication in the AMNS: Sequential and semi-parallel |
Abstract | ||
|---|---|---|
We propose two hardware architectures for the modular multiplication over a finite field Fp using the Adapted Modular Number System (AMNS). We present their optimized implementations, with low latency. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1016/j.jisa.2021.102770 | Journal of Information Security and Applications |
Keywords | DocType | Volume |
Modular multiplication,Hardware implementation,FPGA,Adapted modular number system | Journal | 58 |
ISSN | Citations | PageRank |
2214-2126 | 0 | 0.34 |
References | Authors | |
0 | 6 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Asma Chaouch | 1 | 0 | 0.34 |
| Laurent-Stéphane Didier | 2 | 108 | 11.89 |
| Fangan-Yssouf Dosso | 3 | 2 | 1.45 |
| Nadia El Mrabet | 4 | 51 | 12.82 |
| Bouallegue, B. | 5 | 3 | 0.74 |
| Bouraoui Ouni | 6 | 0 | 0.34 |