Name
Title | ||
|---|---|---|
An Energy-Efficient Approximate Systolic Array Based on Timing Error Prediction and Prevention |
Abstract | ||
|---|---|---|
Deep neural networks (DNNs) have achieved out-standing accuracy on machine learning applications. However, the numbers of parameters and computational costs of DNNs have grown dramatically. To accelerate the numerous matrix multiplication operations in DNNs, a systolic array of multiplyand-accumulate units (MACs) is a widely-used architecture. In this paper, both timing error prediction and approx... |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/VTS50974.2021.9441004 | 2021 IEEE 39th VLSI Test Symposium (VTS) |
Keywords | DocType | ISSN |
Approximate computing,Neural networks,Computer architecture,Machine learning,Very large scale integration,Energy efficiency,Timing | Conference | 1093-0167 |
ISBN | Citations | PageRank |
978-1-6654-1949-9 | 0 | 0.34 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ning-Chi Huang | 1 | 0 | 2.03 |
| Wei-Kai Tseng | 2 | 0 | 0.34 |
| Huan-Jan Chou | 3 | 0 | 0.34 |
| Kai-Chiang Wu | 4 | 113 | 13.98 |