Paper Info
Title
Acceleration Of The Secure Hash Algorithm-256 (Sha-256) On An Fpga-Cpu Cluster Using Opencl
Abstract
The Secure Hash Algorithm-256 (SHA-256) is a cryptographic function used in a wide variety of applications ranging from Internet of Things micro-devices to high-performance systems. This paper studies a set of implementations of the SHA-256 on a field-programmable gate array (FPGA) elaborated using the Open Computing Language (OpenCL). These implementations apply several optimization techniques to improve their respective throughputs. Reported results show that a combination of OpenCL optimization techniques allows obtaining an implementation offering a 90x speed-up when compared to an unoptimized OpenCL implementation. Moreover, the best reported optimized implementation achieves a throughput of 3973 Mbps, which is 4.3 times higher than the best previously published HLS-based SHA-256 implementation and even higher than the previously published implementations using a hardware description language. To our knowledge, this work is the first that proposes an OpenCL-based FPGA implementation of SHA-256 and its OpenCL-based optimization methodology.
Year
DOI
Venue
2021
10.1109/ISCAS51556.2021.9401197
2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
Keywords
DocType
ISSN
SHA-256, OpenCL, FPGA, High-performance computing
Conference
0271-4302
Citations 
PageRank 
References 
0
0.34
0
Authors
3
Name
Order
Citations
PageRank
Hachem Bensalem100.34
Yves Blaquière22411.24
Yvon Savaria3566139.13