Abstract | ||
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Incremental delta-sigma data converters are useful in applications where one ADC is needed to digitize multiple channels. They can be realized using single- or multi-bit feedback. In both cases, the use of FIR feedback is beneficial in terms of improving the modulator’s linearity, reducing the quantizer’s complexity, and mitigating the effects of clock jitter (in a continuous-time realization). In... |
Year | DOI | Venue |
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2021 | 10.1109/TCSI.2021.3080379 | IEEE Transactions on Circuits and Systems I: Regular Papers |
Keywords | DocType | Volume |
Finite impulse response filters,Modulation,Clocks,Quantization (signal),Transfer functions,Jitter,Degradation | Journal | 68 |
Issue | ISSN | Citations |
8 | 1549-8328 | 1 |
PageRank | References | Authors |
0.35 | 0 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Shanthi Pavan | 1 | 391 | 87.81 |
Tanmay Halder | 2 | 1 | 0.69 |
Anand Kannan | 3 | 1 | 0.69 |