Name
Abstract | ||
|---|---|---|
This work presents a MePLER, an in-Memory cumulative distribution table (CDT) sampler, featuring custom cell derived from NAND-Type CAM for range-matching, pipelined and segmented array for reduced energy, and suppressed timing and power side-channel leakage. The precision and sample range are configurable for different sampling requirements. A 65nm prototype achieves constant 85.9-MSps, 1-sample/cycle throughput, 20.6-pJ/sample efficiency, and 0.03-mm
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>
footprint. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.23919/VLSICircuits52068.2021.9492498 | 2021 Symposium on VLSI Circuits |
Keywords | DocType | ISSN |
MePLER,custom cell,NAND-type CAM,range-matching,power side-channel leakage,sample range,sampling requirements,side-channel-aware in-memory CDT sampler,in-memory cumulative distribution table,pipelined segmented array,reduced energy,suppressed timing,precision range,size 65.0 nm | Conference | 2158-5601 |
ISBN | Citations | PageRank |
978-1-6654-4766-9 | 0 | 0.34 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Dai Li | 1 | 0 | 0.34 |
| Yan He | 2 | 6 | 2.18 |
| Akhil Reddy Pakala | 3 | 0 | 0.34 |
| Kuiyuan Yang | 4 | 148 | 20.89 |