Title
Towards Satisfiability Modulo Parametric Bit-vectors
Abstract
Many SMT solvers implement efficient SAT-based procedures for solving fixed-size bit-vector formulas. These techniques, however, cannot be used directly to reason about bit-vectors of symbolic bit-width. To address this shortcoming, we propose a translation from bit-vector formulas with parametric bit-width to formulas in a logic supported by SMT solvers that includes non-linear integer arithmetic, uninterpreted functions, and universal quantification. While this logic is undecidable, our approach can still solve many formulas that arise in practice by capitalizing on advances in SMT solving for non-linear arithmetic and universally quantified formulas. We provide several case studies in which we have applied this approach with promising results, including the bit-width independent verification of invertibility conditions, compiler optimizations, and bit-vector rewrite rules.
Year
DOI
Venue
2021
10.1007/s10817-021-09598-9
Journal of Automated Reasoning
Keywords
DocType
Volume
Satisfiability Modulo Theories, Bit-precise Reasoning, Parametric Bit-vectors
Journal
65
Issue
ISSN
Citations 
7
0168-7433
0
PageRank 
References 
Authors
0.34
0
6
Name
Order
Citations
PageRank
Aina Niemetz1389.61
Mathias Preiner2398.93
Andrew Reynolds321214.79
Yoni Zohar4239.43
Clark Barrett51268108.65
Cesare Tinelli6140979.86