Name
Abstract | ||
|---|---|---|
Logic minimization attracted much attention in the early days because it is the engine for logic synthesis and optimization. Recently, a previous work proposed a SAT-based minimization algorithm for the patch function in the Engineering Change Order (ECO) problem. However, the algorithm is time-consuming for the functions in high dimension Boolean space. Therefore, in this paper, we propose an eff... |
Year | DOI | Venue |
|---|---|---|
2020 | 10.1109/SOCC49529.2020.9524758 | 2020 IEEE 33rd International System-on-Chip Conference (SOCC) |
Keywords | DocType | ISBN |
Heuristic algorithms,Conferences,Minimization,System-on-chip,Optimization,Engines | Conference | 978-1-7281-8746-4 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chia-Chun Lin | 1 | 128 | 15.00 |
| Kit Seng Tam | 2 | 0 | 0.34 |
| Chana-Cheng Ko | 3 | 0 | 0.34 |
| Hsin-Ping Yen | 4 | 0 | 0.34 |
| Shenz-Hsiu Wei | 5 | 0 | 0.34 |
| Yung-Chih Chen | 6 | 413 | 39.89 |
| Wang Chun-Yao | 7 | 251 | 36.08 |