Title
Choice – A Tunable PUF-Design for FPGAs
Abstract
FPGA-based Physical Unclonable Functions (PUFs) have emerged as a viable alternative to permanent key storage by turning inaccuracies during the manufacturing process of a chip into a unique, FPGA-intrinsic secret. However, many fixed PUF designs may suffer from unsatisfactory statistical properties in terms of uniqueness, uniformity, and robustness. Moreover, a PUF signature may alter over time d...
Year
DOI
Venue
2021
10.1109/FPL53798.2021.00015
2021 31st International Conference on Field-Programmable Logic and Applications (FPL)
Keywords
DocType
ISSN
Manufacturing processes,Bit error rate,Physical unclonable function,Turning,Shift registers,Rendering (computer graphics),Reliability engineering
Conference
1946-1488
ISBN
Citations 
PageRank 
978-1-6654-3759-2
1
0.35
References 
Authors
0
6
Name
Order
Citations
PageRank
Franz-Josef Streit110.35
Paul Krüger210.35
Andreas Becher3214.48
Jens Schlumberger410.35
Stefan Wildermann515626.00
Juergen Teich69018.01