Title
Compiler-Assisted Compaction/Restoration of SIMD Instructions
Abstract
Vector processors (e.g., SIMD or GPUs) are ubiquitous in high performance systems. All the supercomputers in the world exploit data-level parallelism (DLP), for example by using single instructions to operate over several data elements. Improving vector processing is therefore key for exascale computing. However, despite its potential, vector code generation and execution have significant challeng...
Year
DOI
Venue
2022
10.1109/TPDS.2021.3091015
IEEE Transactions on Parallel and Distributed Systems
Keywords
DocType
Volume
Registers,Parallel processing,Hardware,Computer architecture,Out of order,Delays,Energy consumption
Journal
33
Issue
ISSN
Citations 
4
1045-9219
0
PageRank 
References 
Authors
0.34
0
7
Name
Order
Citations
PageRank
Juan Manuel Cebrian12410.19
Thibaud Balem200.34
Adrian Barredo302.37
Marc Casas411123.61
Miquel Moretó500.68
Alberto Ros638432.60
Alexandra Jimborean710912.45