Abstract | ||
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Vector processors (e.g., SIMD or GPUs) are ubiquitous in high performance systems. All the supercomputers in the world exploit data-level parallelism (DLP), for example by using single instructions to operate over several data elements. Improving vector processing is therefore key for exascale computing. However, despite its potential, vector code generation and execution have significant challeng... |
Year | DOI | Venue |
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2022 | 10.1109/TPDS.2021.3091015 | IEEE Transactions on Parallel and Distributed Systems |
Keywords | DocType | Volume |
Registers,Parallel processing,Hardware,Computer architecture,Out of order,Delays,Energy consumption | Journal | 33 |
Issue | ISSN | Citations |
4 | 1045-9219 | 0 |
PageRank | References | Authors |
0.34 | 0 | 7 |
Name | Order | Citations | PageRank |
---|---|---|---|
Juan Manuel Cebrian | 1 | 24 | 10.19 |
Thibaud Balem | 2 | 0 | 0.34 |
Adrian Barredo | 3 | 0 | 2.37 |
Marc Casas | 4 | 111 | 23.61 |
Miquel Moretó | 5 | 0 | 0.68 |
Alberto Ros | 6 | 384 | 32.60 |
Alexandra Jimborean | 7 | 109 | 12.45 |