Name
Abstract | ||
|---|---|---|
As von Neumann computing architectures become increasingly constrained by data-movement overheads, researchers have started exploring in-memory computing (IMC) techniques to offset data-movement overheads. Due to the widespread use of SRAM, IMC techniques for SRAM hold the promise of accelerating a broad range of computing systems and applications. In this article, we present a survey of techniques for in-memory computing using SRAM memory. We review the use of SRAM-IMC for implementing Boolean, search and arithmetic operations, and accelerators for machine learning (especially neural networks) and automata computing. This paper aims to accelerate co-design efforts by informing researchers in both algorithm and hardware architecture fields about the recent developments in SRAM-based IMC techniques. |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1016/j.sysarc.2021.102276 | Journal of Systems Architecture |
Keywords | DocType | Volume |
Review,Deep neural networks,SRAM,Cache,In-memory computing,Neural network,Automata computing | Journal | 119 |
ISSN | Citations | PageRank |
1383-7621 | 2 | 0.39 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sparsh Mittal | 1 | 817 | 50.36 |
| Gaurav Gav Verma | 2 | 2 | 4.45 |
| Brajesh Kumar Kaushik | 3 | 56 | 21.31 |
| F. A. Khanday | 4 | 20 | 6.94 |