Name
Title | ||
|---|---|---|
A Region-Based Bit-Shuffling Approach Trading Hardware Cost and Fault Mitigation Efficiency |
Abstract | ||
|---|---|---|
Due to transistor shrinking and core number increasing in System-on-Chip (SoC), fault tolerance has become essential. Indeed, faults occurring to Network-on-Chips (NoCs) of those systems have a significant impact, due to the high amount of data crossing the NoC for communication. However, existing fault correction approaches cannot efficiently address several permanent faults on NoC, due to their ... |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/DFT52944.2021.9568366 | 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) |
Keywords | DocType | ISSN |
Network-on-Chip,Fault Mitigation,Approximate Computing,Hardware Costs Saving,Bit-Shuffling | Conference | 1550-5774 |
ISBN | Citations | PageRank |
978-1-6654-1609-2 | 0 | 0.34 |
References | Authors | |
0 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Romain Mercier | 1 | 0 | 0.34 |
| Cedric Killian | 2 | 14 | 5.04 |
| Angeliki Kritikakou | 3 | 0 | 0.34 |
| Youri Helen | 4 | 0 | 0.34 |
| Daniel Chillet | 5 | 193 | 26.12 |