Abstract | ||
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Circuit analysis with respect to aging-induced degradation is critical to ensure correct operation throughout the entire lifetime of a chip. However, state-of-the-art techniques only allow for the consideration of uniformly applied degradation, despite the fact that different workloads will lead to different degradations due to the different induced activities. This imposes over-pessimism in estim... |
Year | DOI | Venue |
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2021 | 10.1109/ITC50571.2021.00011 | 2021 IEEE International Test Conference (ITC) |
Keywords | DocType | ISSN |
machine learning,transistor aging,reliability | Conference | 1089-3539 |
ISBN | Citations | PageRank |
978-1-6654-1695-5 | 1 | 0.44 |
References | Authors | |
0 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Florian Klemme | 1 | 9 | 2.39 |
Hussam Amrouch | 2 | 251 | 50.22 |