Name
Abstract | ||
|---|---|---|
Approximate computing is an attractive paradigm for reducing the design complexity of error-resilient systems, therefore improving performance and saving power consumption. In this work, we propose a new two-level approximate logic synthesis method based on cube insertion and removal procedures. Experimental results have shown significant literal count and runtime reduction compared to the state-of-the-art approach. The method scalability is illustrated for a high error threshold over large benchmark circuits. The obtained solutions have presented a literal number reduction up to 38%, 56% and 93% with respect to an error rate of 1%, 3% and 5%, respectively. |
Year | DOI | Venue |
|---|---|---|
2022 | 10.1109/TCAD.2022.3143489 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
DocType | Volume | Issue |
Journal | 41 | 11 |
ISSN | Citations | PageRank |
0278-0070 | 0 | 0.34 |
References | Authors | |
0 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gabriel Ammes | 1 | 0 | 0.34 |
| Walter Lau Neto | 2 | 0 | 0.68 |
| Paulo Butzen | 3 | 0 | 0.34 |
| Pierre-Emmanuel Gaillardon | 4 | 0 | 2.03 |
| Renato P. Ribas | 5 | 204 | 33.52 |