Name
Abstract | ||
|---|---|---|
Posit arithmetic is an alternative format to the standard IEEE 754 for floating-point numbers that claims to provide compelling advantages over floats, including higher accuracy, larger dynamic range, or bitwise compatibility across systems. The interest in the design of arithmetic units for this novel format has increased in the last few years. However, while multiple designs for posit adder and ... |
Year | DOI | Venue |
|---|---|---|
2021 | 10.1109/ICCD53106.2021.00032 | 2021 IEEE 39th International Conference on Computer Design (ICCD) |
Keywords | DocType | ISSN |
Deep learning,Quantization (signal),Computational modeling,Pipelines,Dynamic range,Hardware,Energy efficiency | Conference | 1063-6404 |
ISBN | Citations | PageRank |
978-1-6654-3219-1 | 2 | 0.43 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Raul Murillo | 1 | 2 | 0.43 |
| David Mallasén | 2 | 2 | 0.43 |
| Alberto A. Del Barrio | 3 | 78 | 14.49 |
| Guillermo Botella | 4 | 2 | 0.43 |