The Effects of Approximate Multiplication on Convolutional Neural Networks | 0 | 0.34 | 2022 |
PERCIVAL: Open-Source Posit RISC-V Core With Quire Capability | 1 | 0.37 | 2022 |
A Cluster of FPAAs to Recognize Images Using Neural Networks | 0 | 0.34 | 2021 |
First experiences of teaching quantum computing | 0 | 0.34 | 2021 |
Energy-Efficient MAC Units for Fused Posit Arithmetic | 2 | 0.43 | 2021 |
HEVC optimization based on human perception for real-time environments | 0 | 0.34 | 2020 |
Customized Posit Adders and Multipliers using the FloPoCo Core Generator | 0 | 0.34 | 2020 |
Efficient embedding and retrieval of information for high-resolution videos coded with HEVC. | 1 | 0.34 | 2020 |
A Cost-Efficient Iterative Truncated Logarithmic Multiplication for Convolutional Neural Networks | 0 | 0.34 | 2019 |
Simulating and executing circuits employing the quantum computing paradigm | 0 | 0.34 | 2019 |
Efficient Mitchell's Approximate Log Multipliers for Convolutional Neural Networks. | 6 | 0.48 | 2019 |
A Combined Arithmetic-High-Level Synthesis Solution to Deploy Partial Carry-Save Radix-8 Booth Multipliers in Datapaths. | 0 | 0.34 | 2019 |
Complexity reduction in the HEVC/H265 standard based on smooth region classification. | 4 | 0.40 | 2018 |
An ultra low-cost cluster based on low-end FPGAs. | 0 | 0.34 | 2018 |
Intra-Steganography - Hiding Data in High-Resolution Videos. | 0 | 0.34 | 2018 |
Low-power implementation of Mitchell's approximate logarithmic multiplication for convolutional neural networks. | 0 | 0.34 | 2018 |
Data hiding algorithm for HEVC using intra-coded frames. | 0 | 0.34 | 2018 |
Fast and effective CU size decision based on spatial and temporal homogeneity detection. | 6 | 0.43 | 2018 |
A slack-based approach to efficiently deploy radix 8 booth multipliers. | 0 | 0.34 | 2017 |
Simulation and implementation of a low-cost platform to improve the quality of biological images. | 0 | 0.34 | 2017 |
A DCT and neural network based system to obtain the characteristics of biological images. | 0 | 0.34 | 2017 |
A Partial Carry-Save On-the-fly Correction Multispeculative Multiplier | 3 | 0.40 | 2016 |
A Distributed Clustered Architecture to Tackle Delay Variations in Datapath Synthesis. | 2 | 0.43 | 2016 |
A distributed HW-SW platform for fireworks. | 0 | 0.34 | 2016 |
Improving circuit performance with multispeculative additive trees in high-level synthesis. | 3 | 0.41 | 2014 |
Ultra-low-power adder stage design for exascale floating point units | 3 | 0.41 | 2014 |
A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths | 0 | 0.34 | 2013 |
Exploring the energy efficiency of Multispeculative Adders. | 1 | 0.36 | 2013 |
Multispeculative additive trees in high-level synthesis | 3 | 0.40 | 2013 |
Multispeculative Addition Applied to Datapath Synthesis. | 11 | 0.70 | 2012 |
A Distributed Controller for Managing Speculative Functional Units in High Level Synthesis | 18 | 0.98 | 2011 |
Power optimization in heterogenous datapaths. | 0 | 0.34 | 2011 |
Using speculative functional units in high level synthesis | 5 | 0.47 | 2010 |
Subword Switching Activity Minimization to Optimize Dynamic Power Consumption | 0 | 0.34 | 2009 |
Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis | 2 | 0.38 | 2008 |
Applying speculation techniques to implement functional units. | 7 | 0.67 | 2008 |