Title
On Modeling CMOS Library Cells for Cell Internal Fault Test Pattern Generation
Abstract
As the manufactural technologies are moving to deep sub-micron process, the defects inside the design library cells occur more often during manufacture. Cell-Aware Testing (CAT) had been proposed to improve the test quality on detecting the cell internal defects. In CAT, the analog simulator is used to simulate the cell input combinations exhaustively for every defect to identify all the cell inpu...
Year
DOI
Venue
2021
10.1109/ATS52891.2021.00030
2021 IEEE 30th Asian Test Symposium (ATS)
Keywords
DocType
ISSN
cell aware test,library cell,test generation,cell modeling
Conference
1081-7735
ISBN
Citations 
PageRank 
978-1-6654-4051-6
0
0.34
References 
Authors
0
4
Name
Order
Citations
PageRank
Xijiang Lin168742.03
Wu-tung Cheng21350121.45
Takeo Kobayashi300.34
Andreas Glowatz4998.12