Title | ||
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A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping |
Abstract | ||
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This work introduces a bang-bang fractional-
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phase-locked loop with quantization noise shaping that overcomes the classical noise limit of a standard bang-bang phase detector. An adaptive algorithm, working in the background of the main system, guarantees optimal noise shaping across process and environmental variations. The prototype, implemented in a standard 28-nm CMOS process, has a core area of 0.21 mm
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and achieves an rms jitter (integrated from 1 kHz to 100 MHz) of 69.5 fs for integer-
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synthesized channels, 79.7 fs for typical fractional-
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channels, and 99.6 fs for near-integer fractional channels with a worst case fractional spur of −51.1 dBc. The power consumption is 10.8 mW, leading to a jitter-power figure of merit of −252.8 dB and −251.6 dB for integer-
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and fractional-
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channels, respectively. |
Year | DOI | Venue |
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2022 | 10.1109/JSSC.2021.3116860 | IEEE Journal of Solid-State Circuits |
Keywords | DocType | Volume |
5G,bang-bang phase detector (BBPD),low jitter,noise shaping,quantization noise,stochastic resonance | Journal | 57 |
Issue | ISSN | Citations |
6 | 0018-9200 | 1 |
PageRank | References | Authors |
0.35 | 17 | 14 |
Name | Order | Citations | PageRank |
---|---|---|---|
Simone M. Dartizio | 1 | 2 | 1.04 |
Francesco Tesolin | 2 | 1 | 0.35 |
Mario Mercandelli | 3 | 3 | 0.71 |
Alessio Santiccioli | 4 | 4 | 1.06 |
Abanob Shehata | 5 | 1 | 0.69 |
Saleh Karman | 6 | 1 | 0.35 |
Luca Bertulessi | 7 | 15 | 4.73 |
Francesco Buccoleri | 8 | 3 | 1.74 |
Luca Avallone | 9 | 1 | 0.35 |
Angelo Parisi | 10 | 3 | 0.71 |
Andrea L. Lacaita | 11 | 320 | 42.41 |
Michael P. Kennedy | 12 | 1 | 0.35 |
Carlo Samori | 13 | 349 | 39.76 |
Salvatore Levantino | 14 | 351 | 43.23 |