Paper Info
Title
Alias Rejection in CT Delta-Sigma ADCs Using Virtual-Ground-Switched Resistor Feedback
Abstract
High-resolution continuous-time delta-sigma modulators use resistive feedback DACs for low-noise operation. Such DACs have conventionally been switched at the reference end. It turns out that reference-path resistance degrades the performance of these DACs. This problem can be addressed by the virtual-ground-switched resistor DAC. However, moving the switches to the virtual-ground-side degrades alias-rejection of the modulator. This brief analyzes the mechanism of degradation and develops a model to estimate alias rejection. Our theory is supported by simulations and measurements from a prototype modulator designed in a 180nm CMOS process. We then describe a way to address this problem, and demonstrate its efficacy using layout-extracted simulations.
Year
DOI
Venue
2022
10.1109/TCSII.2021.3089914
IEEE Transactions on Circuits and Systems II: Express Briefs
Keywords
DocType
Volume
Oversampling,aliasing,folding,time-varying,compensation
Journal
69
Issue
ISSN
Citations 
4
1549-7747
0
PageRank 
References 
Authors
0.34
3
2
Name
Order
Citations
PageRank
Raviteja Theertham182.29
Shanthi Pavan239187.81