Name
Abstract | ||
|---|---|---|
This paper proposes a 3-input arbiter-based novel physically unclonable function (PUF) design. Firstly, a 3-input priority arbiter is designed using a simple arbiter, two multiplexers (2:1), and an XOR logic gate. The priority arbiter has an equal probability of 0’s and 1’s at the output, which results in excellent uniformity (49.45%) while retrieving the PUF response. Secondly, a new PUF design based on priority arbiter PUF (PA-PUF) is presented. The PA-PUF design is evaluated for uniqueness, non-linearity, and uniformity against the standard tests. The proposed PA-PUF design is configurable in challenge-response pairs through an arbitrary number of feed-forward priority arbiters introduced to the design. We demonstrate, through extensive experiments, reliability of 100% after performing the error correction techniques and uniqueness of 49.63%. Finally, the design is compared with the literature to evaluate its implementation efficiency, where it is clearly found to be superior compared to the state-of-the-art. |
Year | DOI | Venue |
|---|---|---|
2022 | 10.1109/VLSI-SoC54400.2022.9939642 | 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC) |
Keywords | DocType | ISSN |
arbiter,priority arbiter,PUF,device authentication,security,LFSR | Conference | 2324-8432 |
ISBN | Citations | PageRank |
978-1-6654-9006-1 | 0 | 0.34 |
References | Authors | |
21 | 6 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Simranjeet Singh | 1 | 0 | 0.34 |
| Srinivasu Bodapati | 2 | 0 | 0.34 |
| Sachin Patkar | 3 | 0 | 0.34 |
| Rainer Leupers | 4 | 1389 | 136.48 |
| Anupam Chattopadhyay | 5 | 63 | 15.06 |
| Farhad Merchant | 6 | 0 | 0.34 |