Title
Accelerate Hardware Logging for Efficient Crash Consistency in Persistent Memory
Abstract
While logging has been adopted in persistent memory (PM) to support crash consistency, logging incurs severe performance overhead. This paper discovers two common factors that contribute to the inefficiency of logging: (1) load imbalance among memory banks, and (2) constraints of intra-record ordering. Over-loaded memory banks may significantly prolong the waiting time of log requests targeting these banks. To address this issue, we propose a novel log entry allocation scheme (LALEA) that reshapes the traffic distribution over PM banks. In addition, the intra-record ordering between a header and its log entries decreases the degree of parallelism in log operations. We design a log metadata buffering scheme (BLOM) that eliminates the intra-record ordering constraints. These two proposed log optimizations are general and can be applied to many existing designs. We evaluate our designs using both micro-benchmarks and real PM applications. Our experimental results show that LALEA and BLOM can achieve 54.04% and 17.16% higher transaction throughput on average, compared to two state-of-the-art designs, respectively.
Year
DOI
Venue
2022
10.23919/DATE54114.2022.9774633
2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Keywords
DocType
ISSN
Persistent Memory,Crash Consistency,Logging,ADR
Conference
1530-1591
ISBN
Citations 
PageRank 
978-1-6654-9637-7
0
0.34
References 
Authors
9
4
Name
Order
Citations
PageRank
Zhiyuan Lu121.40
Jianhui Yue21489.53
Yifu Deng321.40
Yifeng Zhu451335.33