Name
Abstract | ||
|---|---|---|
An optical receiver employs an all-inverter-based front-end design that provides maximum transconductance for a given power supply and allows for ultra-low power consumption. A multi-stage transimpedance amplifier (TIA) feedback amplifier is utilized to achieve a dramatic increase in feedback resistance and lower input-referred noise. Cascading an inverter-based continuous-time linear equalizer (CTLE) provides frequency peaking to compensate the input stage TIA that is intentionally designed with a reduced bandwidth to achieve adequate sensitivity at low power. Fabricated in 28 nm CMOS, the 12.5 Gb/s optical receiver achieves -10.7 dBm OMA sensitivity at 0.11 pJ/bit energy efficiency. |
Year | DOI | Venue |
|---|---|---|
2022 | 10.1109/MWSCAS54063.2022.9859536 | 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS) |
Keywords | DocType | ISSN |
CMOS,CTLE,inverter,optical receiver,transimpedance amplifier | Conference | 1548-3746 |
ISBN | Citations | PageRank |
978-1-6654-0280-4 | 0 | 0.34 |
References | Authors | |
4 | 10 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Peng Yan | 1 | 0 | 0.34 |
| Chaerin Hong | 2 | 0 | 0.34 |
| Po-Hsuan Chang | 3 | 0 | 0.34 |
| Hyungryul Kang | 4 | 0 | 0.34 |
| Dedeepya Annabattuni | 5 | 0 | 0.34 |
| Ankur Kumar | 6 | 0 | 0.68 |
| Yang-Hang Fan | 7 | 8 | 2.04 |
| Ruida Liu | 8 | 0 | 0.34 |
| Ramy Rady | 9 | 0 | 0.34 |
| Samuel Palermo | 10 | 46 | 7.88 |