Paper Info
Title
A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC
Abstract
This paper presents an agile-designed domain-specific SoC in 12nm CMOS for the emerging application domain of swarm-based perception. Featuring a heterogeneous tile-based architecture, the SoC was designed with an agile methodology using open-source processors and accelerators, interconnected by a multi-plane NoC. A reconfigurable memory hierarchy and a CS-GALS clocking scheme allow the SoC to run at a variety of performance/power operating points. Compared to a high-end FPGA, the presented SoC achieves 7 × performance and 62× efficiency gains for the target application domain.
Year
DOI
Venue
2022
10.1109/ESSCIRC55480.2022.9911456
ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)
Keywords
DocType
ISBN
agile-designed domain-specific SoC,agile-designed SoC,target application domain,CS-GALS clocking scheme,multiplane NoC,open-source processors,agile methodology,heterogeneous tile-based architecture,emerging application domain,reconfigurable memory hierarchy,heterogeneous IP blocks,swarm-based perception,frequency 800.0 MHz,size 12.0 nm
Conference
978-1-6654-8495-4
Citations 
PageRank 
References 
0
0.34
8
Authors
18
Name
Order
Citations
PageRank
Tianyu Jia101.35
Paolo Mantovani280.82
Maico Cassel Dos Santos300.34
Davide Giri400.34
Joseph Zuckerman500.34
Erik Jens Loscalzo600.34
Martin Cochet700.34
Karthik Swaminathan820614.88
Gabriele Tombesi900.34
Jeff Jun Zhang1000.34
Nandhini Chandramoorthy1100.34
John-David Wellman1200.34
Kevin Tien1300.34
Luca P. Carloni141713120.17
Kenneth L. Shepard1540453.01
David Brooks165518422.08
Gu-Yeon Wei171927214.15
Pradip Bose182790210.58