| Accelerators & Security: The Socket Approach | 0 | 0.34 | 2022 |
| A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC | 0 | 0.34 | 2022 |
| CRYLOGGER - Detecting Crypto Misuses Dynamically. | 0 | 0.34 | 2021 |
| DB4HLS: A Database of High-Level Synthesis Design Space Explorations | 0 | 0.34 | 2021 |
| Machine-Learning-Based Microwave Sensing: A Case Study for the Food Industry | 0 | 0.34 | 2021 |
| HL5: A 32-bit RISC-V Processor Designed with High-Level Synthesis | 0 | 0.34 | 2020 |
| Transfer Learning for Design-Space Exploration with High-Level Synthesis | 0 | 0.34 | 2020 |
| A Scalable Architecture for CNN Accelerators Leveraging High-Performance Memories | 0 | 0.34 | 2020 |
| Silicon Photonics Codesign for Deep Learning | 3 | 0.44 | 2020 |
| Teaching Heterogeneous Computing with System-Level Design Methods | 0 | 0.34 | 2019 |
| Cross-ISA machine instrumentation using fast and scalable dynamic binary translation | 1 | 0.37 | 2019 |
| Runtime reconfigurable memory hierarchy in embedded scalable platforms. | 0 | 0.34 | 2019 |
| Towards a Complete Methodology for Synthesizing Bundled-Data Asynchronous Circuits on FPGAs | 0 | 0.34 | 2019 |
| Design and Implementation of a Dynamic Information Flow Tracking Architecture to Secure a RISC-V Core for IoT Applications | 3 | 0.55 | 2018 |
| DarkMem: Fine-grained power management of local memories for accelerators in embedded systems. | 0 | 0.34 | 2018 |
| Accelerators and Coherence: An SoC Perspective. | 5 | 0.42 | 2018 |
| NoC-Based Support of Heterogeneous Cache-Coherence Models for Accelerators | 1 | 0.36 | 2018 |
| COSMOS: Coordination of High-Level Synthesis and Memory Optimization for Hardware Accelerators. | 9 | 0.58 | 2017 |
| System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip | 3 | 0.38 | 2017 |
| Accelerators for Breast Cancer Detection. | 0 | 0.34 | 2017 |
| A Probabilistic Ranking Model for Audio Stream Retrieval. | 0 | 0.34 | 2016 |
| Handling large data sets for high-performance embedded applications in heterogeneous systems-on-chip | 2 | 0.38 | 2016 |
| An FPGA-based infrastructure for fine-grained DVFS analysis in high-performance embedded systems. | 6 | 0.48 | 2016 |
| Scalable Auto-Tuning of Synthesis Parameters for Optimizing High-Performance Processors. | 3 | 0.42 | 2016 |
| A Scalable Black-Box Optimization System for Auto-Tuning VLSI Synthesis Programs. | 0 | 0.34 | 2016 |
| High-level synthesis of accelerators in embedded scalable platforms | 9 | 0.55 | 2016 |
| A Synthesis-Parameter Tuning System For Autonomous Design-Space Exploration | 6 | 0.53 | 2016 |
| Exploiting Private Local Memories to Reduce the Opportunity Cost of Accelerator Integration | 2 | 0.37 | 2016 |
| An analysis of accelerator coupling in heterogeneous architectures | 26 | 0.79 | 2015 |
| Energy-Harvesting Active Networked Tags (EnHANTs): Prototyping and Experimentation | 15 | 0.83 | 2015 |
| Acceleration of microwave imaging algorithms for breast cancer detection via High-Level Synthesis | 1 | 0.35 | 2015 |
| Microwave Imaging for Breast Cancer Detection: A COTS-Based Prototype | 0 | 0.34 | 2015 |
| An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors | 4 | 0.45 | 2015 |
| Design Automation of Electronic Systems: Past Accomplishments and Challenges Ahead [Scanning the Issue] | 0 | 0.34 | 2015 |
| Accelerator Memory Reuse in the Dark Silicon Era | 15 | 0.68 | 2014 |
| Cloud-Aided Design for Distributed Embedded Systems | 3 | 0.41 | 2014 |
| netShip: A networked virtual platform for large-scale heterogeneous distributed embedded systems | 11 | 0.64 | 2013 |
| Modeling and implementation of energy neutral sensing systems | 1 | 0.35 | 2013 |
| Dynamic Reconfiguration of Wireless Sensor Networks to Support Heterogeneous Applications | 12 | 0.79 | 2013 |
| A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer | 24 | 1.48 | 2013 |
| Virtual Channels and Multiple Physical Networks: Two Alternatives to Improve NoC Performance | 21 | 0.88 | 2013 |
| Flexible filters in stream programs | 0 | 0.34 | 2013 |
| Prototyping Energy Harvesting Active Networked Tags (Enhants) | 13 | 0.79 | 2013 |
| A method to abstract RTL IP blocks into C++ code and enable high-level synthesis | 3 | 0.41 | 2013 |
| P-sync: A Photonically Enabled Architecture for Efficient Non-local Data Access | 1 | 0.48 | 2013 |
| A broadband embedded computing system for MapReduce utilizing Hadoop | 3 | 0.44 | 2012 |
| A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A/mm2 | 0 | 0.34 | 2012 |
| Ventti: A vertically integrated framework for simulation and optimization of networks-on-Chip. | 0 | 0.34 | 2012 |
| Engineering a Bandwidth-Scalable Optical Layer for a 3D Multi-core Processor with Awareness of Layout Constraints | 18 | 0.88 | 2012 |
| Time-division-multiplexed arbitration in silicon nanophotonic networks-on-chip for high-performance chip multiprocessors | 14 | 0.66 | 2011 |
