Name
Playground
About
FAQ
GitHub
Playground
Shortest Path Finder
Community Detector
Connected Papers
Author Trending
Sumit Roy
Tidjani Négadi
Pierre-Antoine Manzagol
Jhonathan Pinzon
Liangliang Shang
Giovanni Venturelli
Chen Ma
Robert J Howard
Jing-Sheng Wong
Radu Timofte
Home
/
Author
/
GIOVANNI CHERUBINI
Author Info
Open Visualization
Name
Affiliation
Papers
GIOVANNI CHERUBINI
IBM Research-Zurich, Rüschlikon, Switzerland
16
Collaborators
Citations
PageRank
55
52
9.18
Referers
Referees
References
166
157
59
Search Limit
100
166
Publications (16 rows)
Collaborators (55 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Convergence Behavior of DNNs With Mutual-Information-Based Regularization
1
0.35
2020
In-memory hyperdimensional computing.
9
0.51
2019
Design Techniques for High-Speed Multi-Level Viterbi Detectors and Trellis-Coded-Modulation Decoders.
0
0.34
2018
Compressional Wave Disturbance Suppression For Nanoscale Track-Following On Flexible Tape Media
0
0.34
2018
Graph-Based Data Relevance Estimation for Large Storage Systems
0
0.34
2018
A 4.1 pJ/b 25.6 Gb/s 4-PAM reduced-state sliding-block Viterbi detector in 14 nm CMOS.
0
0.34
2016
Initial resolution of head position and skew uncertainty in control systems for flangeless tape drives
0
0.34
2012
Control Methods in Data-Storage Systems.
7
0.81
2012
Guest Editorial Introduction to the Special Section on Advanced Servo Control for Emerging Data Storage Systems.
1
0.36
2012
Channel modeling and signal processing for probe storage channels
4
0.46
2010
Scaling tape-recording areal densities to 100 Gb/in2
0
0.34
2008
Control of MEMS-Based Scanning-Probe Data-Storage Devices
18
1.80
2007
Signal Processing For Probe Storage
6
1.37
2005
100BASE-T2: a new standard for 100 Mb/s Ethernet transmission over voice-grade cables
1
0.37
1997
100base-T2: 100 Mbit/S Ethernet Over Two Pairs Of Category-3 Cabling
0
0.34
1997
A quaternary partial-response class-IV transceiver for 125 Mbit/s data transmission over unshielded twisted-pair cables: principles of operation and VLSI realization
5
0.77
1995
1