| 3.3 A 14nm 1GHz FPGA with 2.5D transceiver integration | 5 | 1.05 | 2017 |
| Modeling and Design of High-Radix On-Chip Crossbar Switches | 0 | 0.34 | 2015 |
| High-efficiency crossbar switches using capacitively coupled signaling | 0 | 0.34 | 2015 |
| A 33mW 100Gbps CMOS silicon photonic WDM transmitter using off-chip laser sources | 1 | 0.44 | 2013 |
| A micro-architectural analysis of switched photonic multi-chip interconnects | 12 | 0.56 | 2012 |
| A 100+ meter 12Gb/s/lane copper cable link based on clock-forwarding | 0 | 0.34 | 2012 |
| 10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS. | 18 | 1.86 | 2012 |
| Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS | 1 | 0.42 | 2011 |
| Optical Interconnect for High-End Computer Systems | 6 | 0.66 | 2010 |
| Clocking Links in Multi-chip Packages: A Case Study | 0 | 0.34 | 2010 |
| High-bandwidth and low-energy on-chip signaling with adaptive pre-emphasis in 90nm CMOS | 11 | 1.45 | 2010 |
| Optical Interconnects in the Data Center | 0 | 0.34 | 2010 |
| Silicon-photonic network architectures for scalable, power-efficient multi-chip systems | 42 | 1.75 | 2010 |
| Computer Systems Based on Silicon Photonic Interconnects | 48 | 4.03 | 2009 |
| Optical Interconnects for Present and Future High-Performance Computing Systems | 3 | 0.52 | 2008 |
| Circuit Techniques to Enable 430Gb/s/mm2 Proximity Communication. | 18 | 2.25 | 2007 |
| Robust Energy-Efficient Adder Topologies | 21 | 3.76 | 2007 |
| Research Challenges for On-Chip Interconnection Networks | 219 | 8.20 | 2007 |
| High Speed and Low Energy Capacitively Driven On-Chip Wires | 38 | 3.41 | 2007 |
| High-performance ULSI: the real limiter to interconnect scaling | 2 | 0.36 | 2005 |
| Challenges in Building a Flat-Bandwidth Memory Hierarchy for a Large-Scale Computer with Proximity Communication | 8 | 1.78 | 2005 |
| Smart Memories: a modular reconfigurable architecture | 180 | 13.56 | 2000 |
